About

Physics you can trust, at the speed an agent needs

NoveetyAI was founded to turn three decades of published VLSI reliability, thermal and computation research into production chiplet design software — independently implemented, engineered for speed, and callable by an autonomous agent.

Mission

Close integrity in the loop, not at the end of it

Advanced packaging changed the shape of the problem. In a 2.5D or 3D chiplet system-on-package, electrical, thermal, reliability and mechanical physics are coupled — IR-drop drives Joule heating, heat drives electromigration and thermomigration, thermal mismatch drives warpage. Analyzed separately and checked last, each answer is misleading.

We build the simulation engines that are accurate enough to sign off on and fast enough to sit inside an optimization loop — then we make them callable, so an autonomous design agent can evaluate thousands of candidates against real physics rather than a surrogate.

Physics-first

Every engine ships with a ground-truth reference solver, and every result is validated against it.

Speed as a feature

Order-of-magnitude acceleration is what makes closed-loop optimization possible at all.

Agent-native

CLI-first, structured I/O, headless by default. No GUI in the loop.

Open where it counts

Support for OpenROAD alongside commercial flows keeps the door open for research and small teams.

Leadership

Founded on three decades of EDA research

Prof. Sheldon X.-D. Tan

Founder · NoveetyAI
Professor of Electrical & Computer Engineering, University of California, Riverside
Full profile

Prof. Tan directs the VLSI System and Computation Lab (VSCLAB) at UC Riverside, where the NoveetyAI engines originated. His research spans VLSI reliability modeling, thermal analysis and management, hardware acceleration, and AI/LLM-driven approaches to electronic design automation.

  • IEEE Fellow, 2025 — Council on Electronic Design Automation (CEDA)
  • Fellow, Asia-Pacific Artificial Intelligence Association (AAIA), 2025
  • Editor-in-Chief, Integration, the VLSI Journal (2016–2025); currently subject editor
  • Cooperating faculty, Computer Science & Engineering, UC Riverside
  • 30+ years of research in VLSI design and EDA
Origins

From the research lab to your design flow

The algorithm behind each NoveetyAI engine was first published as peer-reviewed research from VSCLAB — open literature, available to anyone — and validated against a reference solver on industrial-scale benchmarks: IBM power-grid circuits, SAED32 place-and-routed designs, and real measured power maps from Snapdragon, Coral Edge-TPU, and Intel Core processors. We then built our own production implementation of each method: engineered for loop speed, CLI-first, structured I/O, and supported as a commercial product.

ThermStack

Spectral thermal solver for 2.5D/3D stacks. 30 cases benchmarked against 3D FEM.

WarpStack

2D laminate + 3D layer-wise FEM warpage. Nine benchmark packages, 3–11 layers.

MetalStack

Coupled EM/TM/IR-drop with spatial thermal maps and Monte Carlo lifetime. Six industrial designs.

GridStack

Advanced Krylov subspace reduction for transient power-grid analysis. Validated to 1.04M nodes.

The methods behind these engines were developed in academic research at the University of California, Riverside and published in the peer-reviewed literature, where they are available to the public. NoveetyAI's software is an independent implementation of those published methods — it is not licensed from, distributed by, or derived from software belonging to UCR. NoveetyAI, Inc. is an independent company; UCR does not endorse its products or services.

Building on chiplets? Let's talk.

Tool access, an evaluation on your own designs, or a design-services engagement — start here.